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Sun CTO sees systems, networks on chips

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Oct 15, 20033 mins
Computers and PeripheralsCPUs and ProcessorsEnterprise Applications

As advances in microprocessor technology give engineers more transistors to design with, the next generations of computer chips will begin to take on the characteristics of computer systems and maybe even networks themselves, Sun Executive Vice Ppresident and CTO Greg Papadopoulos told the MPF Tuesday.

As advances in microprocessor technology give engineers more transistors to design with, the next generations of computer chips will begin to take on the characteristics of computer systems and maybe even networks themselves, Sun Executive Vice Ppresident and CTO Greg Papadopoulos told the MPF Tuesday.

In a keynote address at the annual chip industry conference in San Jose, Papadopoulos said Sun engineers are now working to integrate more system-level features into Sun’s next generation of microprocessors, such as the forthcoming eight-core Niagara processor, which is expected in 2006. Papadopoulos said system features also would be integrated into another as-yet-unnamed multi-core processor being designed for data-intensive tasks such as database serving.

Papadopoulos predicted that this kind of system-on-a-chip architecture, which will integrate features such as networking and encryption onto the processor itself, will help accelerate the rate at which system components can communicate with each other. Over the last 10 years, system bandwidth has doubled every two years, Papadopoulos said. With system-on-a-chip architectures, it will double every 15 months, he predicted.

“Basically, we’re at this point where you build these … computing systems on-chip and surround them with [dynamic RAM],” he said. “Essentially, those chips then form (a) computing fabric that you then build out to the network.”

A “small collection” of these system-on-a-chip processors could eventually be the equivalent of a 1,000-way symmetric multiprocessing system, Papadopoulos said.

Other than confirming that it existed and that it would focus on data-intensive tasks, Papadopoulos offered few details of the post-Niagara processor, but he did hint that such a chip would include on-processor networking and could eventually be considered “logically equivalent” to a large symmetric multiprocessing system.

Adding system-level features to the processor will open up a new range of system designs, he said. “Some of the most interesting spaces are between what you call storage, and what you call computing and what you call networking,” he said.

More details on the data-intensive chip will be revealed within the next six months. It is expected to appear some time after the UltraSparc V processor, which is slated to ship by 2006, Sun said.

Papadopoulos predicted that in the next few years, microprocessors could contain as many as 1 billion transistors, paving the way for the follow-up to Sun’s system on a chip. “I think in 2010 we’ll really be at the point where we don’t care about instruction set architectures,” he said, referring to the different types of machine language code executed by processors.

“What’s the next stage of integration?” he asked. “That’s full networks on chips.”