With advances in chip technology, it’s becoming more difficult for Intel to keep up with Moore’s Law, but the company’s CEO says that remains the key baseline when it comes to adding performance and functionality to its processors. “Our job at Intel is to make sure it lives on as long as possible,” Brian Krzanich said during a keynote at the Intel investor meeting in Santa Clara, California, Thursday. Next year marks the 50th year anniversary of Moore’s Law, and Intel is planning to mark the event, Krzanich said. Moore’s Law is based on an observation by Gordon Moore, who co-founded Intel in 1968, that the number of transistors that can be placed on silicon will double every two years, making it possible to improve chip performance and add new functionality. Intel has used Moore’s Law, which was offered in a 1965 paper, as a baseline to pack more transistors onto chips, and reduce their size and cost. But with chips shrinking to the atomic level, engineers and scientists have declared that Moore’s Law has reached its last stages. Intel at the investor conference said it has packed more performance and power savings into its latest chips while achieving cost savings in line with Moore’s Law, though production and design issues caused it to veer off the path. Intel usually releases new chips every year and implements new manufacturing processes every two years. But the company has had trouble making chips using the 14-nanometer process, which is the most advanced in the industry. It took Intel two and a half years to get the full benefits of the 14-nanometer process. The first chips based on the 14-nm process shipped earlier this year, but yields are just starting to reach Intel’s projected expectations, compared to the previous 22-nanometer process, said Bill Holt, executive vice president and general manager of Intel’s Technology and Manufacturing Group. Production of the first 14-nanometer chips code-named Broadwell is in a “healthy range,” though hasn’t yet recovered after initial lapses, Holt said, adding that yields will reach 22-nm levels by early 2015, Holt said. “Our 22-nanometer technology is the highest yielding technology we’ve ever had. The bar that we’re trying to catch up to there is very high,” Holt said. “That’s essential, because if you’re going to get cost reduction [you] have to match those other parameters of your previous generation.” But yields are still not normal for Intel, which is known for its timely execution. Problems with Broadwell production have led to delays in the release of laptops and tablets. The first Broadwell-based tablets and hybrids have just started appearing on store shelves and will be in mainstream laptops early next year. Intel is also trying to move on from its initial struggles with 14-nm and is looking forward. The company brushed Broadwell aside at the recent Intel Developer Forum and promoted its next-generation architecture called Skylake, which will also be made using the 14-nm process, with features for wire-free computing and better graphics. Market needs have defined Intel’s manufacturing priorities. With the PC market weakening, Intel is churning out more mobile chips in which power consumption remains a priority over performance. That has changed the way Intel has built processors, with the company adopting a system-on-chip approach where a number of processing and wireless modules are integrated in one chipset. Krzanich said Intel still wants cutting-edge transistors, but depending on priorities, Moore’s Law could be achieved using multiple paths. Balance needs to be found in cost, performance and power consumption. Intel is approaching Moore’s Law from the economics related to cost-per-transistor, which would come down with scaling. With the 22-nm process, Intel adopted a new chip design in which it started stacking transistors on top of each other. That was enhanced with 14-nm technology, in which chip sizes were made even smaller. Intel was slightly below the trend line on cost reduction with 14-nm process compared to previous manufacturing processes when taking Moore’s Law into account, Holt said. In terms of chip design, Intel scaled down the transistor fin pitch, and aggressively reduced the scale of the interconnect so all the building blocks on chips fit together in a cohesive way. But it could not achieve aggressive scaling with the gate pitch or SRAM memory cells. But as Moore’s Law detractors have argued, etching more and more features on smaller chips will get even more challenging. Chips could be vulnerable to a wider range of defects, and a lot more of attention to detail is required when designing and making chips. Intel is looking to implement new technologies like EUV (extreme ultraviolet) lithography, which will help produce chips at smaller geometries. It is also shifting to 450-millimeter wafers so it’s less expensive to make chips. Intel is also researching chip materials that could possibly replace silicon. The 14-nm process will be succeeded by the 10-nm and the 7-nm processes. Holt did not say when the first chips based on those processes would be released, but Moore’s Law will be applicable. “We are quite confident we can continue to deliver on the promises of Moore’s Law,” Holt said. Related content news Cisco patches actively exploited zero-day flaw in Nexus switches The moderate-severity vulnerability has been observed being exploited in the wild by Chinese APT Velvet Ant. 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